Principle of Single Chip Microcomputer (4): System Expansion and Peripheral Interface

When the internal functions of the single chip microcomputer can not meet the requirements of the application system, the process of connecting the corresponding peripheral chips outside the chip to meet the requirements of the application system is called system expansion.Through the peripheral interface technology, MCU can control LED nixie tube, keyboard, LCD display and other external equipment, as well as a / D and D / a conversion, so that MCU can be used in a wider field.51 single chip microcomputer integrates the basic components of computer such as CPU, I / O port, timer, interrupt system and memory, plus simple auxiliary circuits such as power supply, reset circuit and clock single circuit to form a minimum system that can work normally. The circuit is shown in the following figure:

51 single chip microcomputer has strong external expansion ability. Most conventional chips can be used as the peripheral expansion circuit of single chip microcomputer. The expansion can include memory expansion, I / O port expansion, serial bus interface memory expansion and so on.Bus (bus) is a common channel for information transmission by CPU, memory, input, output and other devices in the computer. It is a transmission harness composed of wires. Various components of the host are connected through it, and external devices are connected with the bus through corresponding interface circuits, thus forming a computer hardware system. According to the type of information transmitted by the computer, the bus of the computer can be divided into address bus, data bus and control bus, which are used to transmit data, data address and control signal respectively.The system expansion method of single chip microcomputer includes parallel expansion method and serial expansion method. The parallel expansion method uses the address bus, data bus and control bus of single chip microcomputer for system expansion, while the serial expansion method uses SPI (serial peripheral interface) bus or I2C (inter integrated circuit) bus for system expansion.

The system bus signals contained in 51 single chip microcomputer are shown in the table above. In order to reduce the number of pins, time-sharing multiplexing technology is adopted for data line and address line in the expansion bus of 51 series single chip microcomputer.In addition to being a general I / O port, port P0 can also time-sharing multiplex the low 8 bits (A0 A7) and data bus signals (d0 D7) of the transmission address bus signal. Whether it transmits the low 8 bits address signal or data signal at a certain time is indicated by the level state of ale pin. In addition to being a general I / O port, P2 port can also transmit the high 8 bits (A8 A15) of address bus signal. Other system bus signals are control signals, which are generated with hardware when executing different instructions.In actual use, the separation of address signal and data signal can be realized by external connection of an 8-bit latch, as shown in the schematic diagram of signal separation circuit using 74ls373 in the following figure:

During bus expansion, since the width of the address bus is 16 bits, the maximum direct addressing range of external ROM or ram is 64KB, and their addresses can be overlapped.

When expanding the bus, the first thing to do is to allocate the address space, that is, divide the 64KB address space into several pages of the same size through the address decoding method. The low address line is used to select the units in the page, and the high address line is used to select the pages. Different external devices occupy different pages. After the allocation is completed, we should find a way to decode the address to facilitate the addressing of the single chip microcomputer. Common address decoding methods include full address decoding method and "partial address decoding method".

Full address decoding means that all address lines participate in decoding, and the resulting address space is continuous. Each data unit corresponds to the address one by one, and the structure of its circuit is generally complex. For example, if the size of a storage page is 8KB and the 64KB storage space is to be divided into 8 pages, all high-order addresses A13 A15 must participate in decoding to generate 8 independent page selection signals to form a continuous address segment, which is generally realized by 3-8 decoder, as shown in the following figure:Partial decoding refers to that only a part of the addresses participate in decoding. The obtained address space is a discontinuous address segment, which does not cover the whole addressable space. A data unit may correspond to several addresses. As shown below:Another line selection method is a special form of partial decoding method, that is, without decoding the address line, the address line is directly used to gate the data unit, and the obtained address space is also discontinuous. For example, without additional decoding circuit, only the high-order address line is used to divide the 64KB addressing space into several areas, as shown in the figure below:

When 51 single chip microcomputer accesses external ROM, its control bus is only composed of ale, PSEN and EA. When EA = 1, when the address to be accessed by the single chip microcomputer exceeds the range of on-chip ROM, it will automatically turn to off-chip ROM addressing. The external ROM can be accessed through the instruction "MOVC a, @ a dptr". The logical relationship and timing of control signals during instruction execution are shown in the following figure:When using 2764 extended 32KB ROM, the wiring diagram is as follows:When 51 single chip microcomputer accesses external RAM, the control bus is composed of ale, PSEN, RD and wr. When "MOVX a, @ drtp" and "MOVX @ dptr, a" instructions are executed, the operation of reading and writing external RAM is carried out. The logical relationship and timing of control signals during instruction execution are shown in the following figure:

When using SRAM chip 61128 to expand 32KB ram, the wiring diagram is as follows:The method of expanding I / O port in parallel is basically the same as that of expanding ram.LED (light emitting diode) display is a display device for displaying fields composed of several light-emitting diodes. The commonly used LED display has seven segment digital display.

The Seven Segment LED digital display is composed of 8 light-emitting diodes. According to different connection forms of internal LEDs, it can be divided into common cathode and common anode. The cathodes of common cathode LED are connected together, and the anodes of common anode LED are connected together. The circuit connection is shown in the figure below:

When the common cathode nixie tube is selected, the cathodes of all LEDs are connected together and grounded. When the anode of an LED is connected to high level, the corresponding LED will light up. On the contrary, when the cathode of an LED is connected to low level, the corresponding LED will be lit. Each time some specific LED is turned on, the nixie tube can be used to display some numbers or symbols. The LED nixie tube has 8 bits, which is exactly one byte. It is customary to take the segment code byte corresponding to segment "a" as the lowest bit. In this way, different displays can be obtained only by inputting different segment codes.

The display mode of LED nixie tube generally adopts dynamic display, which saves I / O port. However, in this method, only one display can be lit at any time. When there are many display bits, dynamic scanning code needs to be adopted. The frequency of dynamic scanning has certain requirements, which can not be perceived by human eyes. If the frequency is too low, the LED will flicker, and if the frequency is too high, the lighting time of each LED is too short, and the brightness of the LED is too low to be seen by the naked eye. The program often uses the method of calling the delay subroutine to gate a certain led to light up and keep it for about several Ms.

In the single chip microcomputer application system, it is often necessary to input some instructions or parameters to the single chip microcomputer, and the operation results of the single chip microcomputer sometimes need to be output through the external display or printer for the operator to understand and master the operation status of the single chip microcomputer in time. This constitutes a human-computer interaction interface. Due to the characteristics of MCU itself, it can not have human-computer interaction components such as keyboard, display and printer, so it can only expand these functions through its I / O port.The keyboard can be divided into coded keyboard and non coded keyboard. The recognition of the closing key on the coded keyboard is realized by special hardware, while the non coded keyboard is realized by software. Single chip microcomputer generally adopts non coding keyboard.The keyboards used in the single-chip microcomputer system are mechanical elastic keys. Because of the elastic effect of mechanical contacts, there will be jitter at the moment when the keys are closed and pop up. The key jitter generally lasts for 5 10ms. In order to make a key be processed only once, the key jitter must be eliminated. The key jitter can be eliminated by software or hardware.

RS flip-flop is usually used to eliminate jitter in hardware, which needs to be improved in circuit and is more complex. The software is simpler to eliminate chattering. When a key is detected to be closed, it is detected again after a short delay. If the key is still detected to be closed, it is considered that the key is really closed.The keyboard is connected to the MCU interface by independent and matrix. Each key of the stand-alone keyboard is separately connected with an I / O port, and the input status of each key does not affect each other. The single chip microcomputer can judge which key is pressed by detecting the level of the corresponding I / O port. However, when the number of keys is large, it occupies more I / O ports.When a large number of keys are required, the matrix connection mode is usually adopted. Matrix keyboard is composed of row lines and column lines, so it is sometimes called determinant keyboard. The key is located at the intersection of row and column lines, which are respectively connected with I / O ports. The connection mode is shown as follows:

The recognition method of matrix keyboard usually adopts scanning method. Shilling a column line, for example, the output of column line 0 is "0", and the output of the other three column lines is "1". Then scan the status of the row line in turn. If a row line is "0", it means that the key at the intersection of the row line and column line 0 is pressed. If all lines are "1", no key is pressed. Similarly, you can set the next column line to "0" in turn, and the other column lines to "1" and scan the row line, so that you can judge the position of the key.

Update history:*The first draft was completed on November 28, 2017Original link