Performance Characteristics and Application Example Analysis of Serial Analog-to-digital Converter M

Max144max is a new dual channel 12 bit serial analog-to-digital converter produced by Maxim company in the United States. It has the functions of automatic shutdown and fast wake-up, and is internally integrated with clock circuit and sample / hold circuit; At the same time, it has the advantages of high conversion rate and low power consumption. It is especially suitable for intelligent instruments that are powered by batteries and have high requirements for volume and accuracy. The main features of max144 are as follows:

single power supply voltage range is 2.7 5.25V;

with two analog signal input channels CH0 and ch1? The analog signal voltage range is 0 VREF;

sampling frequency up to 108ksps;

low power consumption. When VDD is 3.6V and the sampling frequency reaches the maximum value of 108ksps, the power consumption is only 3.2mw;

serial interface compatible with SPI / QSPI / microwire.

2. Pin function

Max144 adopts DIP8 package, and its pin functions are as follows:

VDD: positive power terminal, 2.7 5.25V;

CH0 / ch1: analog signal input channel;

GND: Analog ground / digital ground;

Ref: external reference voltage input, used as analog-to-digital conversion reference voltage;

CS / SHDN: this pin is at low level and is chip selection input; It is high level, and it is power down mode input;

Dout: serial data output terminal;

SCLK: serial clock input.

3. Instructions for use

3.1 analog signal input

The two analog input channels CH0 and ch1 of max144 can be connected to two different signal sources. After power on reset, max144 will automatically a / D convert the analog signal of CH0 channel, automatically switch to ch1 channel after conversion, and a / D convert the analog signal of ch1 channel, and then switch and convert between CH0 and ch1 channels alternately. A channel flag bit chid contained in the output data? It is used to determine which channel the data is converted to. If there is only one analog signal, CH0 and ch1 can be connected together as an input channel, but the output data still contains the channel flag bit chid.

Max144 has analog input protection circuit inside, so the input signal is allowed to change from GND 300mV to VDD 300mV. If the required conversion accuracy is high, the input signal shall not be greater than VDD 50mV? And not less than GND 50mV.

3.2 clock mode and working sequence

Setting CS / SHDN to low level can start the A / D conversion process. At the falling edge of CS / SHDN, the internal sample / hold circuit will enter the sampling mode. At this time, if SCLK is high level, select the internal clock mode; If it is low level, select external clock mode. Fig. 2 shows a timing diagram of internal and external clock modes. When the serial clock frequency is less than 100kHz or greater than 2.17mhz, the internal clock mode shall be selected. When working in the external clock mode, because the external clock not only moves out data, but also drives analog-to-digital conversion, the A / D conversion must be at 140 S, otherwise the voltage on the capacitor in the sample / hold circuit may reduce the accuracy of the conversion result. After the conversion, the internal oscillation circuit is closed and dout changes to high level. At this time, the conversion data can be read.

3.3 output data format

Table 1 shows the serial output data formats in internal and external clock modes. It can be seen from table 1 that the serial data output format is high in front and low in back. At least 16 clock cycles are required to read a converted data. The first three bits are always high level (EOC bit is also included in the internal clock mode). The fourth bit is the channel flag bit chid. Chid = 0 indicates CH0 channel, that is, the data is converted from CH0 channel; Chid = 1 indicates ch1 channel, that is, the data is converted from ch1 channel; Next is the 12 bit a / D conversion data, the most significant bit is in the front, and each bit of data is moved out at the rising edge of SCLK; After the conversion, CS / SHDN changes to high level, and dout is in high impedance state.

Table 1 data output format of max14

4. Application of max144 in level adjuster

Fig. 3 is an example of the successful application of max144 to the level adjuster. The level regulator has two analog signals, which need to be alternately converted, and the signals alternating in two directions are horizontally adjusted according to the conversion results. Max144 can just meet this requirement. The analog signal is amplified and filtered and connected to the CH0 and ch1 ports of max144.

Since the analog signal voltage range is 0 2.0V? Therefore, the reference voltage of max144 can be set to 2.048v? This can improve the conversion accuracy and facilitate the subsequent processing of the converted data. The reference voltage of 2.048v can be provided by ref191. The interface between max144 and MCU is very simple. Only three I / O lines are needed. The circuit adopts internal clock mode. The MCU generates serial clock through programming and reads out data according to timing. Its a / D conversion subroutine is as follows:

The converted data (16 bits) can be stored in r3r2. CH0 and ch1 channels can be distinguished by the flag bit chid, and then the actual A / D conversion data can be obtained by masking the upper 4 bits.

Since the input signal generally contains various noises and interferences, in order to obtain accurate conversion data, the input signal should be connected in series with a 470 resistor and a 0.01 resistor F bypass capacitor to weaken the clock noise generated by the switched capacitor filter. Digital filtering program can be used in programming, such as median filtering, average filtering, etc. When designing the circuit board, the analog signal input path shall be as short as possible, and the analog signal and digital signal shall be wired separately; Analog ground and digital ground shall also be isolated and short circuited near the ground wire of max144; The high-frequency noise introduced by the positive power supply VDD will also affect the conversion accuracy. Therefore, two parallel bypass capacitor networks can be used to filter it.

Max144 is compatible with other serial interface standards (such as SPI? QSPI? Microwire, etc.), and can be directly connected with SPI? The microwire serial interface interfaces with the microprocessor.